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Synopsys

DDR/LPDDR IP Design Principal Engineer

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Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Seeking a highly motivated and innovative senior engineer with wide-spectrum knowledge of generic ASIC design methodology, and simulation/silicon debug skills.

The candidate would be working as part of a highly experienced DDR/LPDDR design and verification team, targeting the current and next generation technology. Theoretical and practical background in DDR or LPDDR is a solid plus.

The position offers an excellent opportunity to work with a professional team of digital and mixed-signal engineers responsible for delivering high-end designs and supporting DDR/LPDDR products.

Key Qualifications

Preferred Experience

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