CPU Top-Level Design Verification Engineer

Summary

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product.

In this highly visible role, you will be at the center of a chip design effort interfacing with many disciplines, with a critical impact on getting high quality products to millions of customers quickly.

Description

As a CPU Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower power processor design, you will have the responsibilities as follows:

• Work closely with verification engineers and RTL designers on defining effective verification methodology for low power complex processor design
• Develop test plans, test benches, and test environments
• Develop tests in assembly, and C/C++
• Drive and develop the tools and flows for advanced verification methodology
• Developing, verifying, and maintaining efficient testbench environments
• Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered

Minimum Qualifications

Minimum BS and 3+ years of relevant industry experience

Preferred Qualifications

BS in Electrical Engineering, Computer Science, or Computer Engineering preferred

Computer Architecture - Strong understanding of processor design, instruction set architectures, pipeline design, cache hierarchies, and memory systems

RTL development - Experience creating efficient, synthesizable RTL code with understanding of timing closure, area optimization, and power-aware design techniques

SystemVerilog - Proficiency in SystemVerilog including advanced features like interfaces, assertions, and verification constructs. Ability to write clean, maintainable HDL code for both design and verification

Programming/scripting skills (C, C++, Python) - Strong software development capabilities for automation and tool development. C/C++ experience with embedded programming and hardware interfaces. Python proficiency for scripting, design automation, and EDA tool integration

Problem solving skills - Analytical thinking and systematic approach to complex hardware design and verification challenges

Testbench Setup and Build Experience - Experience with build systems, regression frameworks, and maintaining verification infrastructure. Ability to set up automated testing flows and integrate with continuous integration systems

Random Regression and Failure Analysis Experience running large-scale random regression suites and systematically analyzing test failures. Skilled in debugging complex simulation issues, identifying root causes, and distinguishing between design bugs, testbench issues, and tool problems. Proficiency with waveform analysis and debug methodologies

Driving Coverage Convergence Expertise - Experience developing coverage models, analyzing coverage gaps, and creating targeted tests to improve coverage metrics. Ability to work with design teams to achieve verification closure and sign-off criteria

Be an outstanding teammate with excellent communication skills and the desire to address diverse challenges