Senior Principal Engineer, Signal Integrity & Power Integrity (SerDes IP)

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services that help customers accelerate innovation and productivity.

Our Silicon IP team develops high-performance SerDes solutions that enable AI, cloud, networking, HPC, and optical communications systems.

You Are

An experienced SI/PI engineer with deep expertise in high-speed SerDes design and analysis. You have a strong understanding of signal integrity across silicon, package, board, and system environments and enjoy solving complex technical challenges in collaboration with cross-functional teams.

What You'll Be Doing

• Lead Signal Integrity and Power Integrity investigations and drive resolution of complex design challenges.
• Define and execute SI/PI strategies for advanced SerDes products, including package, channel, and 3DIC considerations.
• Develop and maintain SI/PI requirements for PCIe and Ethernet products across chip, package, board, and system levels.
• Perform channel feasibility analysis, modeling, simulation, and correlation activities.
• Review and sign off SI/PI aspects of SerDes transmitter, receiver, and test chip designs.
• Collaborate with architecture, design, package, and applications engineering teams throughout product development.
• Participate in industry standards activities and apply emerging best practices.
• Support customer engagements and technical debug activities.

The Impact You Will Have

• Drive the development of next-generation SerDes IP solutions.
• Influence product performance, interoperability, and signal integrity methodology.
• Enable successful deployment of high-speed interfaces for AI, networking, and data center applications.

What You'll Need

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering with at least 15+ years of direct industry experience.
• Proven experience in Signal Integrity and Power Integrity for high-speed SerDes designs.
• Expertise in PCIe and/or Ethernet systems and channel design.
• Strong knowledge of NRZ/PAM4 signaling, S-parameter modeling, and SI simulation methodologies.
• Experience with HFSS, ADS, HSpice, MATLAB, and IBIS-AMI.
• Understanding of package, substrate, and PCB technologies.

Who You Are

• Strong analytical and problem-solving skills.
• Effective communicator with the ability to collaborate across disciplines.
• Self-motivated and capable of driving technical initiatives independently.
• Committed to technical excellence and continuous innovation.

The Team You'll Be Part Of

You will be part of the Silicon IP team developing next-generation SerDes IP solutions for HPC, wireline, and optical applications. You will work closely with experts across architecture, design, verification, packaging, and applications engineering to deliver industry-leading connectivity solutions.

Rewards and Benefits

Synopsys offers a comprehensive and competitive benefits package to support your health, well-being, and professional growth.